Document WO 2006/129005 discloses a device for protection against the overvoltages generated by the supply mains. This device comprises, in particular, two field-effect transistors (FETs) connected in series and capable of limiting the current when this becomes greater than their current limit. However, when an overvoltage is caused by the switching of inductive or capacitive loads present on the supply mains, a large voltage variation may appear at each switching operation. Since the output voltage of the device of the prior art is fixed by parallel limiting means of the transil diode type, all the rest of the overvoltage is applied to the junction field-effect transistors (JFETs). The inductive current generated during the switching overvoltage may then be much higher than the current limit of the JFETs. In this case, the voltage across the terminals of the system increases greatly, until a transistor goes into avalanche mode and therefore no longer limits the current. The energy dissipated in the transistor is then considerable and may result in destruction of the components.